I/O ports:
1. I/O 所使用的address space 跟CPU不同
2. ports代表的只是一個address
3. x86利用不同的instruction來區分, inb, inw,
對port的讀寫有Side effect:
- memory 的讀寫可能被cached
- operation可能被re-order
- Idiosyncrasy: composition doesn’t necessarily work
outw0x1010<port> != outb0x10<port> + outb 0x10 <port+1>
Port 的permission
1. 透過IOPL flag in EFLAGS
2. "the processor first checks whether CPL <= IOPL. If this condition is true, the I/O operation may proceed. If not true, the processor checks the I/O permission map." ref1
3. 之後會檢查TSS裡面的I/O permission bitmap, 每個IO port代表一個byte address, bitmap裡面的每一個bip代表存取這個byte address (port)的權限
Memory Mapped IO
1. Map devices onto regions of physical memory
2. Win: Cast interface regions to a structure
3. Hardware basically redirects these accesses away from RAM at same location (if any), to devices
Side Effect
缺點是還是會有 side effects: (因此需要使用barrier)
常用的最佳化:
1. out-of-order execution
2. reorder write
3. cache values in register (cache越久越好)
但當我們想讀寫devices時, 我們希望馬上寫進去
__volatile__:
- 直接讀寫記憶體, 不經過cache or optimization
- write must go directly to memory
- read must come from memory
- 防止記憶體存取最佳化, 防止刪除記憶體動作
Compiler and CPU barrier:
1. Clobber list in the inline assembly:
2. Basic idea: In some cases, CPU can issue loads and stores out of program order (optimize perf)
利用fense instruction去確保執行順序
Reference:
1. http://pdos.csail.mit.edu/6.828/2011/readings/i386/s08_03.htm#fig8-2
2. CSE506 slide by Professor Don Porter
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